How to Calculate Output Clock Phase?
Output Clock Phase calculator uses pll_output_clock_phase = 2*3.14*VCO Control voltage*vco gain to calculate the Pll Output Clock Phase, The Output Clock Phase formula is defined as the amount of time it takes from the clock at the pin of the FPGA, to the output signal at the FPGA. Pll Output Clock Phase and is denoted by ΔΦout(s) symbol.
How to calculate Output Clock Phase using this online calculator? To use this online calculator for Output Clock Phase, enter VCO Control voltage (Vctrl(t)) and vco gain (Kvco) and hit the calculate button. Here is how the Output Clock Phase calculation can be explained with given input values -> 188.4 = 2*3.14*10*3.